registerfile
address_width=10
reg64 spadic_rf.loopback (0x0)
- verilog name=loopback
- desc=[2] DES2BS Loopback;[1] BS2DEC Loopback; [0] DEC2USR Loopback. Sets loopback modes.
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[2:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.overrides (0x8)
- verilog name=overrides
- desc=[6] link_active;[5] user_pin2;[4] user_pin1;[3] align_initovr;[2] link_ready;[1] rxpcs_initovr; [0] txpcs_initovr. Delivers user pins and override pins for link_active, align_initovr, link_ready, rxpcs_initovr, txpcs_initovr - physical link init.
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[6:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_CbmNetAddr (0x10)
- verilog name=REG_CbmNetAddr
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_EpochCounter (0x18)
- verilog name=REG_EpochCounter
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_threshold1 (0x20)
- verilog name=REG_threshold1
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[8:0] |
ro |
rw |
9’b000000010 |
|
reg64 spadic_rf.REG_threshold2 (0x28)
- verilog name=REG_threshold2
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[8:0] |
ro |
rw |
9’b000001010 |
|
reg64 spadic_rf.REG_compDiffMode (0x30)
- verilog name=REG_compDiffMode
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[0:0] |
ro |
rw |
1’b1 |
|
reg64 spadic_rf.REG_hitWindowLength (0x38)
- verilog name=REG_hitWindowLength
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[5:0] |
ro |
rw |
6’b010000 |
|
reg64 spadic_rf.REG_selectMask_l (0x40)
- verilog name=REG_selectMask_l
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_selectMask_h (0x48)
- verilog name=REG_selectMask_h
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
16’b1111_1111_1111_0000 |
|
reg64 spadic_rf.REG_bypassFilterStage (0x50)
- verilog name=REG_bypassFilterStage
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[4:0] |
ro |
rw |
5’b1_1111 |
|
reg64 spadic_rf.REG_aCoeffFilter_l (0x58)
- verilog name=REG_aCoeffFilter_l
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_aCoeffFilter_h (0x60)
- verilog name=REG_aCoeffFilter_h
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[1:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_bCoeffFilter_l (0x68)
- verilog name=REG_bCoeffFilter_l
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_bCoeffFilter_h (0x70)
- verilog name=REG_bCoeffFilter_h
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[7:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_scalingFilter (0x78)
- verilog name=REG_scalingFilter
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[8:0] |
ro |
rw |
9’b000100000 |
|
reg64 spadic_rf.REG_offsetFilter (0x80)
- verilog name=REG_offsetFilter
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[8:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_groupIdA (0x88)
- verilog name=REG_groupIdA
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[7:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_groupIdB (0x90)
- verilog name=REG_groupIdB
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[7:0] |
ro |
rw |
8’b00000001 |
|
repeatblock REG_neighborSelectMatrixA (0x98)
reg64 spadic_rf->REG_neighborSelectMatrixA[?].part (offset 0x0)
- verilog name=REG_neighborSelectMatrixA_0_part (the 0 probably has to be replaced)
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_neighborSelectMatrixA_H (0x188)
- verilog name=REG_neighborSelectMatrixA_H
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[3:0] |
ro |
rw |
$zero |
|
repeatblock REG_neighborSelectMatrixB (0x190)
reg64 spadic_rf->REG_neighborSelectMatrixB[?].part (offset 0x0)
- verilog name=REG_neighborSelectMatrixB_0_part (the 0 probably has to be replaced)
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_neighborSelectMatrixB_H (0x280)
- verilog name=REG_neighborSelectMatrixB_H
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[3:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_disableChannelA (0x288)
- verilog name=REG_disableChannelA
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_disableChannelB (0x290)
- verilog name=REG_disableChannelB
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_disableEpochChannelA (0x298)
- verilog name=REG_disableEpochChannelA
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[0:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_disableEpochChannelB (0x2a0)
- verilog name=REG_disableEpochChannelB
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[0:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_enableTestOutput (0x2a8)
- verilog name=REG_enableTestOutput
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[0:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_testOutputSelGroup (0x2b0)
- verilog name=REG_testOutputSelGroup
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[0:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_enableAdcDec_l (0x2c0)
- verilog name=REG_enableAdcDec_l
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_enableAdcDec_h (0x2c8)
- verilog name=REG_enableAdcDec_h
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[4:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_triggerMaskA (0x2d0)
- verilog name=REG_triggerMaskA
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_triggerMaskB (0x2d8)
- verilog name=REG_triggerMaskB
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_enableAnalogTrigger (0x2e0)
- verilog name=REG_enableAnalogTrigger
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[0:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.REG_enableTriggerOutput (0x2e8)
- verilog name=REG_enableTriggerOutput
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[0:0] |
ro |
rw |
$zero |
|
reg64 spadic_rf.control (0x2f0)
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
mode |
[1:0] |
ro |
wo |
$zero |
|
chain |
[2:2] |
ro |
wo |
$zero |
|
length |
[13:3] |
ro |
wo |
$zero |
|
reg64 spadic_rf.status (0x2f8)
the contained hwregs
Name |
field |
hw |
sw |
reset value |
desc |
|
[15:0] |
wo |
ro |
|
|
ramblock spadic_rf.data (0x300)
- verilog name=data
- ramwidth=16
- addrsize=5